instruction level parallelism中文什么意思

發(fā)音:

用"instruction level parallelism"造句

指令級并行

ilp(instruction level parallelism: 指令級平行運算
tlp(thread level parallelism: 線程級并行
and parallelism: 與并行性
or parallelism: 或并行性
parallelism: n. 1.平行。 2.相同，類似；比較；對應(yīng)。 3.【哲學(xué)】心身平行論。 4.【生、數(shù)】平行現(xiàn)象，平行性。 5.【修辭學(xué)】對應(yīng)法，對聯(lián)。

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例句與用法

ilp instruction level parallelism
指令級平行運算
epic defines a new style of architecture that enables higher levels of instruction level parallelism ( ilp ) without unacceptable hardware complexity
epic是一種顯性并行指令計算體系結(jié)構(gòu)，主要思想是利用編譯器和處理器的協(xié)同能力來提高指令級并行度。
state-of-the-art microprocessors exploit instruction level parallelism ( ilp ) to achieve high performance on applications by searching for independent instructions in a dynamic window of instructions and executing them on a wide-issue pipeline
對于當(dāng)前軟件中占主要部分的串行程序而言，微處理器主要依靠開發(fā)程序的指令級并行(ilp)來提高性能。
multithreaded microprocessor, which has many hardware contexts sharing an execution core, can efficiently exploit both the instruction level parallelism and thread level parallelism to acquire higher performance and better performance / power ratio
多份硬件現(xiàn)場共享一組執(zhí)行單元的多線程處理器能靈活地利用程序中的指令級并行和線程級并行，從而提供更好的性能。
one of the key elements to achieving higher performance in microprocessors is executing more instructions per cycle . however, dependencies among instructions, varying latencies of certain instructions, and execution resources constraints, limit this parallelism considerably . in order to exploit instruction level parallelism, processor should employ data dependence analysis to identify independent instructions that can execute in parallel
當(dāng)前，在微處理器體系結(jié)構(gòu)研究中，為了充分提高微處理器的處理性能，主要采用了指令級并行技術(shù)(ilp)，指令級并行性的開發(fā)程度對發(fā)揮微處理器的硬件特性，提高程序運行性能至為關(guān)鍵。

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instruction level parallelismとは意味

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instruction level parallelism中文什么意思

例句與用法

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